Sunday 15 December 2013

Memory Map and Addresses of microprocessor

The memory map is a picture representation of the address range and shows where the different memory chips are located within the address range.

Address Range of a Memory Chip

The address range of a particular chip is the list of all addresses that are mapped to the chip.

An example for the address range and its relationship to the memory chips would be the Post Office Boxes in the post office.
Each box has its unique number that is assigned sequentially. (memory locations)
The boxes are grouped into groups. (memory chips)
The first box in a group has the number immediately after the last box in the previous group.

Address Range of a Memory Chip

The above example can be modified slightly to make it closer to our discussion on memory.
Let’s say that this post office has only 1000 boxes. 
Let’s also say that these are grouped into 10 groups of 100 boxes each. Boxes 0000 to 0099 are in group 0, boxes 0100 to 0199 are in group 1 and so on.

We can look at the box number as if it is made up of two pieces:
The group number and the box’s index within the group. 
So, box number 436 is the 36th box in the 4th group.

The upper digit of the box number identifies the group and the lower two digits identify the box within the group.

The 8085 and Address Ranges

The 8085 has 16 address lines. So, it can address a total of 64K memory locations.
If we use memory chips with 1K locations each, then we will need 64 such chips. 
The 1K memory chip needs 10 address lines to uniquely identify the 1K locations.  (log21024 = 10)
That leaves 6 address lines which is the exact number needed for selecting between the 64 different chips (log264 = 6).

The 8085 and Address Ranges

Now, we can break up the 16-bit address of the 8085 into two pieces:

A15 A14 A13 A12 A11 A10  A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 


Depending on the combination on the address lines A15 - A10 , the address range of the specified chip is determined.

Chip Select Example

A chip that uses the combination A15  - A10 = 001000 would have addresses that range from 2000H to 23FFH.
Keep in mind that the 10 address lines on the chip gives a range of 00 0000 0000 to 11 1111 1111 or 000H to 3FFH for each of the chips.
The memory chip in this example would require the following circuit on  its chip select input:
To illustrate this with a picture:
in the first case, the memory chip occupies the piece of the memory map identified as before. 
In the second case, it occupies the piece identified as after.

High-Order vs. Low-Order Address Lines

The address lines from a microprocessor can be classified into two types:
High-Order
Used for memory chip selection
Low-Order
Used for location selection within a memory chip.

This classification is highly dependent on the memory system design.

Data Lines

All of the above discussion has been regarding memory length. Lets look at memory width. 
We said that the width is the number of bits in each memory word. 
We have been assuming so far that our memory chips have the right width. 
What if they don’t?
It is very common to find memory chips that have only 4 bits per location. How would you design a byte wide memory system using these chips?
We use two chips for the same address range. One chip will supply 4 of the data bits per address and the other chip supply the other 4 data bits for the same address.

Data Lines